A Study of Resistive Open Fault Detection on Low Power Nanometric ICs

Resistive open fault represents degradation in conductivity within a circuit interconnection. Due to this manufacturing failure occurs in IC interconnection. Such fault causes performance failures and reliability risk. an interconnect open defects have attracted a significant research effort world-wide to reduce test cost without an affecting the fault coverage-in the context of multi-VDD designs. Recent studies have shown that full open defects can be tested using static test techniques at any VDD setting, as they do not exhibit VDD dependent detectability. On the other hand, the resistive-open defects are better detectable and these elevated at applying multiple VDD settings using various delay test techniques. This paper presents the analysis of various detection methods for resistive open faults. And detectable resistance range versus VDD varies with the test speed also observes. Depending on test speed and small delay faults Multi-VDD is required for detection of ROFs.

Keywords: Resistive Open Faults, Small Delay Faults, Test Speed, Low Power Design,

Multi-VDD Test.